Untimely machinery breakdown will incur significant losses, especially to the manufacturing company as it affects the production rates. During operation, machines generate vibrations and there are unwanted vibrations that will disrupt the machine system, which results in faults such as imbalance, wear, and misalignment. Thus, vibration analysis has become an effective method to monitor the health and performance of the machine. The vibration signatures of the machines contain important information regarding the machine condition such as the source of failure and its severity. Operators are also provided with an early warning for scheduled maintenance. Numerous approaches for analyzing the vibration data of machinery have been proposed over the years, and each approach has its characteristics, advantages, and disadvantages. This manuscript presents a systematic review of up-to-date vibration analysis for machine monitoring and diagnosis. It involves data acquisition (instrument applied such as analyzer and sensors), feature extraction, and fault recognition techniques using artificial intelligence (AI). Several research questions (RQs) are aimed to be answered in this manuscript. A combination of time domain statistical features and deep learning approaches is expected to be widely applied in the future, where fault features can be automatically extracted from the raw vibration signals. The presence of various sensors and communication devices in the emerging smart machines will present a new and huge challenge in vibration monitoring and diagnosing.

The term Internet of Things (IoT) has emerged in recent decades because this network revolutionizes almost every aspect of our daily life, including products such as smartphones and intelligent vehicles, and crucial tasks such as precision agriculture and environmental monitoring. Myriads of communication technologies have been developed to fulfill the two main features of the IoT: long-range transmissions and low power consumption. Long-range (LoRa) has become one of the vital parts of IoT communication. In this study, the real-time deployments of an unmanned aerial vehicle (UAV)-based LoRa communication network are systematically reviewed, with a focus on the communication setup and its reported performance. Importantly, the UAV-based LoRa communication network has a low bit rate connectivity to ensure the high reliability of connections, especially in applications that require long transmission ranges. This study provides recommendations for researchers on what research perspectives need to be explored when implementing UAVs for IoT-based LoRa communication. This study also describes publication trends related to UAV-based LoRa communication networks. A supplementary Excel file that contains the reported publications on UAV-based LoRa communication networks is included to show this publication trend.

This paper presents a high speed 16-bit hybrid Digital-to-Analog converter (DAC) featuring an innovative digital filtering mechanism designed to eliminate glitches and ensure high signal integrity at an operational speed of 1 GS/s. Fabricated using a 65 nm process and operating on a 1 V supply, the hybrid DAC integrates a current-steering architecture for the six most significant bits (MSB) and a binary-weighted resistive ladder for the ten least significant bits (LSB), effectively managing power consumption. Occupying an active area of 0.06 mm2, the DAC consumes 45 mW of power. It demonstrates differential nonlinearity (DNL) ranging from −0.27 to +0.25 LSB and integral nonlinearity (INL) from −0.33 to +0.34 LSB. Performance metrics at the Nyquist frequency include a spurious-free dynamic range (SFDR) of 72 dB and a signal-to-noise-and-distortion ratio (SNDR) of 70 dB, yielding a figure of merit (FOM) of 13.83 fJ/step. The DAC demonstrates resilience to process, voltage, and temperature (PVT) variations, with a deviation of less than 4%, confirming its reliability for the 5G New Radio (NR) sub-6 GHz application. The proposed hybrid DAC provides a fast, accurate, and power-efficient solution for high-speed, high-resolution data conversion catering to the demanding requirements of 5G NR sub-6 GHz systems.

This paper presented the theory, planning, control and method for Unmanned Aerial Vehicles performing precision landings on a moving platform. Unmanned Aerial Vehicles performing flight mission often having issues of its retrieving due to the landing sequence inaccuracy which may lead to crash. Thus, in this paper, by using adaptive method and image processing, the H480 hexacopter, equipped with a gimbaled camera detecting the moving platform attached to a ground rover using a pattern recognition algorithm. Using AprilTag as the unique pattern, the H480 follows the moving platform and moves via pitch and roll instructions while constantly descending towards the ground. In this paper, the system proposed the degree of pitch and roll changes with regards to the position of the AprilTag i.e., the further the tag location detected from the camera center, the higher the degree of movement, such that the tag will be forced to be in the center of the camera frame. The system divides a camera frame into an 11x11 matrix in which each cell within the matrix suggests different pitch and roll degrees for the H480 movement. As a result, the system manages to assist the landing process for the H480 to reach the moving platform successfully with less than 0.5m offset from the center of the target.

Radio frequency energy harvesting (RFEH) is one form of renewable energy harvesting currently seeing widespread popularity because many wireless electronic devices can coordinate their communications via RFEH, especially in CMOS technology. For RFEH, the sensitivity of detecting low-power ambient RF signals is the utmost priority. The voltage boosting mechanisms at the input of the RFEH are typically applied to enhance its sensitivity. However, the bandwidth in which its sensitivity is maintained is very poor. This work implements a tunable voltage boosting (TVB) mechanism fully on-chip in a 3-stage cross-coupled differential drive rectifier (CCDD). The TVB is designed with an interleaved transformer architecture where the primary winding is implemented to the rectifier, while the secondary winding is connected to a MOSFET switch that tunes the inductance of the network. The TVB enables the sensitivity of the rectifier to be maintained at 1V DC output voltage with a minimum deviation of −2 dBm across a wide bandwidth of 3 to 6 GHz of 5G New Radio frequency (5GNR) bands. A DC output voltage of 1 V and a peak PCE of 83% at 3 GHz for −23 dBm input power are achieved. A PCE of more than 50% can be maintained at the sensitivity point of 1 V with the aid of TVB. The proposed CCDD-TVB mechanism enables the CMOS RFEH to be operated for wideband applications with optimum sensitivity, DC output voltage, and efficiency.

This paper presents an integrated up-conversion passive mixer fitted with an on chip active RF Balun merged with Class-C VCO. This combo architecture limit the use of off chip passive balun for combining the differential signal input to single-ended signal output implemented in RF Transmitter system. The proposed architecture adopts a symmetric passive ring mixer for high linearity, port to port isolation and stable matching. The mixer achieves highest power conversion gain of 36 dB across the VCO input power, high input 3rd order intercept point (IIP3) of 11.2 dBm and gain of 8 dB at 2.45 GHz. The integrated VCO results in phase noise of −117.2 dBc/Hz at 1 MHz offset with large signal output power of 5.2 dBm. The entire architecture occupies chip area of 1.21 mm2 designed in 180 nm technology, consuming 5 mW of dc power consumption under supply voltage of 1 V.

The purpose of this paper is to introduce a new linearization technique known as the passive linearizer technique which does not affect the power added efficiency (PAE) while maintaining a power gain of more than 20 dB for complementary metal oxide semiconductor (CMOS) power amplifier (PA).

A low-power capacitorless demultiplexer-based multi-voltage domain low-dropout regulator (MVD-LDO) with 180 nm CMOS technology is proposed in this work. The MVD-LDO has a 1.5 V supply voltage headroom and regulates an output from four voltage domains ranging from 0.8 V to 1.4 V, with a high current efficiency of 99.98% with quiescent current of 53 µA with the aid of an integrated low-power demultiplexer controller which consumes only 68.85 pW. The fabricated chip has an area of 0.149 mm2 and can deliver up to 400 mA of current. The MVD-LDO’s line and load regulations are 1.85 mV/V and 0.0003 mV/mA for the low-output voltage domain and 3.53 mV/V and 0.079 mV/mA for the high-output voltage domain. The LDO consumes only 174.5 µW in standby mode, making it suitable for integrating with an RF energy harvester chip to power sensor nodes.