Publication Showcase

Publication Showcase

Knowledge in Action
Dive into peer-reviewed publications and thought leadership shaping the frontiers of knowledge. This showcase connects you with the insights, data, and discoveries fueling innovation. Whether you’re a researcher staying current, an industry leader spotting trends, or a curious mind digging deeper — this is your portal to fresh thinking.

Enhancement of RF Power Measurement in 1/f Noise Using FPGA
This paper presents a proposed architecture for enhancing RF power measurement in 1/f noise using field programmable gate array (FPGA). Algorithm development and verification is first done on Matlab. Next, Quartus II and ModelSim software is used to implement the algorithm on FPGA. A real noise signal from industrial collaborator is used to verify the performance and functionality of the implementation. The proposed architecture consists of five main modules which are whitening, wavelet decomposition, denoising, signal recovery and power estimation. Based on the implementation result, the proposed architecture shows 1.74 % percentage of error at 10 dBm signal power and 60.85 dB SNR and utilized 2.84 % logic elements (LE).
Design of a Non-Overlapping Clock Generator for RFID Transponder EEPROM
A non-overlapping clock (NOC) generator circuit is designed for the successful operation of high voltage generator (HVG) implementation in low-power applications like radio frequency identification (RFID) tag EEPROM. The NOC generator has been implemented in 0.18 μm CMOS process. The designed NOC can generate two stable anti-phase clock signals as output, which is used in charge pump (CP) circuit with low power dissipation. The NOC generator required lower power dissipation with 359.87 nW under power supply voltage (VDD) 1.8 V. Moreover, this designed NOC generator produced faster clock signals with 0.972 μS as the settling time.
Low power and high speed CMOS current comparators
Over the past few decades, a current comparator in CMOS technology has been used in the wide range of application in analogue, multiple-valued logic (MVL) circuits and other electronic products. Current comparator usually used in analog to digital (ADC) conversion and any sensing detector or devices. The design of comparator has been successfully performed by applying several techniques and approach to improve the performance. This paper presents an overview of evolutionary CMOS current comparator, describing the contributions in low power and high speed according a collection of existing proposal. Various schemes and information have been taken to help researcher who will continue work on significant further developments. Lastly, some consideration of recent architectures such as power consumption and speed in current comparator are presented.
Electromagnetic behaviour of flexible substrates with meshed and conductive films ground planes
In this work the electromagnetic performance at high frequency of flexible substrates with meshed and conductive film ground planes is compared with that of flexible substrates with unmeshed (solid) ground planes. Several types of specially designed structures have been studied — mesh ground, conductive film ground and solid copper ground. The conductive film used in this work is based on Tatsuta silver film which is developed especially for flex interconnects to be used in hinge applications in smart phones, and LCD drivers. The flat and bend cases of the flexible substrate are also compared and reported in this work. The comparison is done in frequency domain as well as in time domain through simulation. The structures are compared in terms of their far-field radiation as well as near-field coupling. The simulations have shown that the meshed and conductive film ground will affect the near-field coupling and the loss of the transmission structures but there is little difference in terms of radiating field.
A study on dimensional variation in flexible printed circuits during post-lamination baking
The dimensional shrinkage for single-layer flexible printed circuit (FPC) panels measured after post-lamination baking has been evaluated experimentally and using a finite element model. Experiments and modelling for dot hatch flexible printed circuit panels show a linearly decreasing dimensional change with increasing copper fill percentage. Across three material suppliers, there is a strong variation in dimensional change for a given FPC design. A finite element model has been developed to simulate the shrinkage due to the volumetric contraction of the epoxy adhesive. The model fits well with the experimental data for low to medium copper fill percentages, but further work to incorporate the dimensional variation in the copper is required to improve accuracy at high copper fill percentages. The model indicates that adhesive shrinkage plays an important role in the overall dimensional change in FPCs.
Review of droop-controlled bi-directional inverter in conducting islanded operation of photovoltaic systems
Global warming due to the excessive greenhouse gas emissions has led to the emergence of green technologies in Malaysia, particularly photovoltaic (PV) systems. Under the current regulatory framework, islanded operation of the PV system is not permissible. As a result, any renewable energy sources will be disconnected immediately in the event of grid outages. This practice is to ensure the safety of working personnel, as well as the customer equipment connected within the distribution networks. In addition, there is no synchronizing equipment to aid the reconnection of the islanded network to the grid. However, with the shutdown of the Distributed Generator (DG) during islanded operation, the customers are not able to utilize the available renewable energy and the number of power interruption is not improved with the renewable energy sources. Therefore, the main objective of this paper is to investigate the feasibility of the PV system in conducting islanding operation with the use of Energy Storage System (ESS). This paper also proposes a control algorithm to maintain the voltage and frequency excursion within the statutory limit by manipulating the real and reactive power flow of the ESS within the transition period between grid connected and islanding operation.
Energy storage system for peak shaving
The main purpose of this study is to provide an effective sizing method and an optimal peak shaving strategy for an energy storage system to reduce the electrical peak demand of the customers. A cost-savings analytical tool is developed to provide a quick rule-of-thumb for customers to choose an appropriate size of energy storage for various tariff schemes.
Active Control Strategy of Energy Storage System for Reducing Maximum Demand Charges under Limited Storage Capacity
Commercial and industrial customers are subject to monthly maximum demand charges, which can be as high as 30% of the total electricity bill. A battery-based energy storage system (BESS) can be used to reduce the monthly maximum demand charges. A number of control strategies have been developed for the BESS to reduce the daily peak demands. However, the existing control strategies may fail to reduce the peaks on some occasions because the energy of the BESS runs out during the process of peak reduction. Therefore, a new active control strategy for the BESS is developed and presented in this paper. This strategy is able to reduce the peaks even though the peaks are different from the forecasted ones. This strategy is able to reduce the monthly maximum demands by 9% when the BESS capacity is reduced to 37% of the full capacity due to financial constraints. Hence, the customers can achieve the payback period of 11 years over the project lifespan of 21 years with the reduced capacity of the BESS.

Let’s Collaborate

Do you have an idea or a solution that you want to bring to life?